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» Synchronous Programming of Reactive Systems
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SBACPAD
2008
IEEE
126views Hardware» more  SBACPAD 2008»
14 years 3 months ago
A Software Transactional Memory System for an Asymmetric Processor Architecture
Due to the advent of multi-core processors and the consequent need for better concurrent programming abstractions, new synchronization paradigms have emerged. A promising one, kno...
Felipe Goldstein, Alexandro Baldassin, Paulo Cento...
FPGA
2009
ACM
183views FPGA» more  FPGA 2009»
14 years 3 months ago
HW/SW methodologies for synchronization in FPGA multiprocessors
Modern Field Programmable Gate Arrays (FPGA) can be programmed with multiple soft-core processors. These solutions can be used for MultiProcessor Systems-on-Chip (MPSoCs) prototyp...
Antonino Tumeo, Christian Pilato, Gianluca Palermo...
MICRO
2010
IEEE
156views Hardware» more  MICRO 2010»
13 years 7 months ago
Explicit Communication and Synchronization in SARC
SARC merges cache controller and network interface functions by relying on a single hardware primitive: each access checks the tag and the state of the addressed line for possible...
Manolis Katevenis, Vassilis Papaefstathiou, Stamat...
MFCS
1995
Springer
14 years 12 days ago
An Abstract Account of Composition
act Account of Composition Mart n Abadi1 and Stephan Merz2 1 Digital Equipment Corporation, Systems Research Center, 130 Lytton Avenue, Palo Alto, CA 94301, U.S.A. 2 Institut fur I...
Martín Abadi, Stephan Merz
POPL
2009
ACM
14 years 9 months ago
Modular code generation from synchronous block diagrams: modularity vs. code size
We study modular, automatic code generation from hierarchical block diagrams with synchronous semantics. Such diagrams are the fundamental model behind widespread tools in the emb...
Roberto Lublinerman, Christian Szegedy, Stavros Tr...