419 search results - page 20 / 84 » Synthesis of networks on chips for 3D systems on chips |
DATE
2010
IEEE
14 years 1 months ago
2010
IEEE
—In this paper, we examine the design process of a Network on-Chip (NoC) for a high-end commercial System onChip (SoC) application. We present several design choices and focus on...
FPL
2009
Springer
14 years 18 days ago
2009
Springer
This paper investigates the challenges of run-time resource management in future coarse-grained network-onreconfigurable-chips (NoRCs). Run-time reconfiguration is a key feature e...
DATE
2007
IEEE
14 years 3 months ago
2007
IEEE
In this paper we present a systematic comparison between two different implementations of a distributed Network on Chip: fully asynchronous and multi-synchronous. The NoC architec...
ISVLSI
2008
IEEE
14 years 3 months ago
2008
IEEE
The evolution of deep submicron technologies allows the development of increasingly complex Systems on a Chip (SoC). However, this evolution is rendering less viable some well-est...
EH
2000
IEEE
14 years 1 months ago
2000
IEEE
Reconfigurable chips are integrated circuits whose internal connections can be programmed by the user to attend a specific application. Field Programmable Gate Arrays (FPGAs) and ...