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» Synthesis of networks on chips for 3D systems on chips
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ACSD
2006
IEEE
102views Hardware» more  ACSD 2006»
13 years 10 months ago
Models of Computation for Networks on Chip
Networks on chip platforms offer the opportunity to introduce a new abstraction level that defines a set of platform services with performance and power characteristics. By making...
Axel Jantsch
GLOBECOM
2009
IEEE
14 years 18 days ago
On-Chip Integrated Antenna Structures in CMOS for 60 GHz WPAN Systems
Abstract--This paper presents several on-chip antenna structures that may be fabricated with standard CMOS technology for use at millimeter wave frequencies. On-chip antennas for w...
Felix Gutierrez Jr., Kristen Parrish, Theodore S. ...
ARC
2007
Springer
116views Hardware» more  ARC 2007»
14 years 2 months ago
Systematic Customization of On-Chip Crossbar Interconnects
Abstract. In this paper, we present a systematic design and implementation of reconfigurable interconnects on demand. The proposed on-chip interconnection network provides identic...
Jae Young Hur, Todor Stefanov, Stephan Wong, Stama...
SIPS
2007
IEEE
14 years 3 months ago
Dynamic Channel Flow Control of Networks-on-Chip Systems for High Buffer Efficiency
System-on-Chip (SoC) designs become more complex nowadays. The communication between each processing element often suffers challenges due to the wiring problem. Networks-on-Chip (...
Sung-Tze Wu, Chih-Hao Chao, I-Chyn Wey, An-Yeu Wu
PDP
2011
IEEE
13 years 13 days ago
Energy-Aware Task Allocation for Network-on-Chip Based Heterogeneous Multiprocessor Systems
—Energy-efficiency is becoming one of the most critical issues in embedded system design. In Network-on-Chip (NoC) based heterogeneous Multiprocessor Systems, the energy consump...
Jia Huang, Christian Buckl, Andreas Raabe, Alois K...