Sciweavers

419 search results - page 22 / 84
» Synthesis of networks on chips for 3D systems on chips
Sort
View
DAC
2002
ACM
14 years 9 months ago
Constraint-driven communication synthesis
Constraint-driven Communication Synthesis enables the automatic design of the communication architecture of a complex system from a library of pre-defined Intellectual Property (I...
Alessandro Pinto, Luca P. Carloni, Alberto L. Sang...
ISCAS
2005
IEEE
146views Hardware» more  ISCAS 2005»
14 years 2 months ago
A novel approach for network on chip emulation
— Current Systems-On-Chip execute applications that demand extensive parallel processing. Networks-On-Chip (NoC) provide a structured way of realizing interconnections on silicon...
Nicolas Genko, David Atienza, Giovanni De Micheli,...
DATE
2004
IEEE
129views Hardware» more  DATE 2004»
14 years 14 days ago
Cost-Performance Trade-Offs in Networks on Chip: A Simulation-Based Approach
A challenge facing designers of systems on chip (SoC) containing networks on chip (NoC) is to find NoC instances that balance the cost (e.g. area) and performance (e.g. latency an...
Santiago González Pestana, Edwin Rijpkema, ...
DSD
2008
IEEE
94views Hardware» more  DSD 2008»
14 years 3 months ago
Mapping a Fault-Tolerant Distributed Algorithm to Systems on Chip
Systems on chip (SoC) have much in common with traditional (networked) distributed systems in that they consist of largely independent components with dedicated communication inte...
Gottfried Fuchs, Matthias Függer, Ulrich Schm...
FPL
2006
Springer
91views Hardware» more  FPL 2006»
14 years 12 days ago
Reconfigurable Systems Enabled by a Network-on-Chip
A modern SoC design comprises dozens of dedicated IP cores for specialized tasks and processors for generalpurpose tasks. Flexibility is the key feature of processors, since it is...
Leandro Möller, Ismael Grehs, Ney Calazans, F...