419 search results - page 24 / 84 » Synthesis of networks on chips for 3D systems on chips |
CODES
2007
IEEE
14 years 3 months ago
2007
IEEE
3D stacked wafer integration has the potential to improve multiprocessor system-on-chip (MPSoC) integration density, performance, and power efficiency. However, the power density...
SBCCI
2005
ACM
14 years 2 months ago
2005
ACM
Networks on chip (NoCs) draw on concepts inherited from distributed systems and computer networks subject areas to interconnect IP cores in a structured and scalable way. Congesti...
ISCA
2008
IEEE
14 years 3 months ago
2008
IEEE
Future chip multiprocessors (CMPs) may have hundreds to thousands of threads competing to access shared resources, and will require quality-of-service (QoS) support to improve sys...
DATE
2006
IEEE
14 years 2 months ago
2006
IEEE
A communication-centric design approach, Networks on Chips (NoCs), has emerged as the design paradigm for designing a scalable communication infrastructure for future Systems on C...
DAC
2001
ACM
14 years 9 months ago
2001
ACM
We present a design flow for the generation of application-specific multiprocessor architectures. In the flow, architectural parameters are first extracted from a high-level syste...