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» Synthesis of networks on chips for 3D systems on chips
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IPPS
2005
IEEE
14 years 1 months ago
The SDVM - An Approach for Future Adaptive Computer Clusters
The Self Distributing Virtual Machine (SDVM) is a parallel computing machine which consists of a cluster of customary computers. The participating machines may have different comp...
Jan Haase, Frank Eschmann, Klaus Waldschmidt
FPL
2005
Springer
111views Hardware» more  FPL 2005»
14 years 1 months ago
Mutable Codesign for Embedded Protocol Processing
This paper addresses exploitation of the capabilities of platform FPGAs to implement embedded networking for systems on chip. In particular, a methodology for exploring trade-offs...
Todd S. Sproull, Gordon J. Brebner, Christopher E....
ICS
2005
Tsinghua U.
14 years 29 days ago
A NUCA substrate for flexible CMP cache sharing
We propose an organization for the on-chip memory system of a chip multiprocessor, in which 16 processors share a 16MB pool of 256 L2 cache banks. The L2 cache is organized as a n...
Jaehyuk Huh, Changkyu Kim, Hazim Shafi, Lixin Zhan...
ISPD
2004
ACM
161views Hardware» more  ISPD 2004»
14 years 27 days ago
Early-stage power grid analysis for uncertain working modes
High performance integrated circuits are now reaching the 100-plus watt regime, and power delivery and power grid signal integrity have become critical. Analyzing the performance ...
Haifeng Qian, Sani R. Nassif, Sachin S. Sapatnekar
IPPS
2003
IEEE
14 years 22 days ago
Leveraging Block Decisions and Aggregation in the ShareStreams QoS Architecture
ShareStreams (Scalable Hardware Architectures for Stream Schedulers) is a canonical architecture for realizing a range of scheduling disciplines. This paper discusses the design c...
Raj Krishnamurthy, Sudhakar Yalamanchili, Karsten ...