10159 search results - page 105 / 2032 » System Design Validation Using Formal Models |
SIGSOFT
2011
ACM
13 years 3 months ago
2011
ACM
Developing complex distributed systems is a non-trivial task. It is even more difficult when the systems need to dynamically reconfigure the distributed functionalities or tasks...
ICFEM
2009
Springer
14 years 2 months ago
2009
Springer
Internet protocols encapsulate a significant amount of state, making implementing the host software complex. In this paper, we define the Statecall Policy Language (SPL) which pr...
FM
2008
Springer
13 years 9 months ago
2008
Springer
Abstract. The paper presents a deductive framework for proving program equivalence and its application to automatic verification of transformations performed by optimizing compiler...
MTV
2007
IEEE
14 years 2 months ago
2007
IEEE
Abstract—Abstract models of analog/mixed-signal (AMS) circuits can be used for formal verification and system-level simulation. The difficulty of creating these models preclude...
WSC
1998
13 years 9 months ago
1998
This paper discusses how simulation is used to design new manufacturing systems and to improve the performance of existing ones. Topics to be discussed include: manufacturing issu...