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» System Design Validation Using Formal Models
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VLSID
1999
IEEE
101views VLSI» more  VLSID 1999»
14 years 4 days ago
Formal System Design Based on the Synchrony Hypothesis, Functional Models and Skeletons
Formal approaches to HW and system design have not been generally adopted, because designers often view the modelling concepts in these approaches as unsuitable for their problems...
Ingo Sander, Axel Jantsch
FLAIRS
2000
13 years 9 months ago
Formal Concepts of Learning Systems Validation in Use
Volker Dötsch, Gunter Grieser, Klaus P. Jantk...
HICSS
2009
IEEE
116views Biometrics» more  HICSS 2009»
14 years 2 months ago
Systems Modeling for IP-Based Handoff Using Timed Petri Nets
The mechanisms and design principles needed for achieving optimized handoff for mobile Internet services are poorly understood and need better analysis. This paper contributes to ...
Ashutosh Dutta, Bryan Lyles, Henning Schulzrinne, ...
MEMOCODE
2008
IEEE
14 years 2 months ago
Virtual prototyping AADL architectures in a polychronous model of computation
While synchrony and asynchrony are two distinct concepts of concurrency theory, effective and formally defined embedded system design methodologies usually mix the best from both...
Ma Yue, Jean-Pierre Talpin, Thierry Gautier