Sciweavers

284 search results - page 44 / 57
» System Level Design Space Exploration for Multiprocessor Sys...
Sort
View
BIRTHDAY
2012
Springer
12 years 3 months ago
A Qualitative Security Analysis of a New Class of 3-D Integrated Crypto Co-processors
3-D integration presents many new opportunities for architects and embedded systems designers. However, 3-D integration has not yet been explored by the cryptographic hardware com...
Jonathan Valamehr, Ted Huffmire, Cynthia E. Irvine...
BMCBI
2008
111views more  BMCBI 2008»
13 years 7 months ago
MLIP: using multiple processors to compute the posterior probability of linkage
Background: Localization of complex traits by genetic linkage analysis may involve exploration of a vast multidimensional parameter space. The posterior probability of linkage (PP...
Manika Govil, Alberto Maria Segre, Veronica J. Vie...
ESTIMEDIA
2003
Springer
14 years 24 days ago
A Component Oriented Simulator for HW/SW Co-Designs
In order to extensively explore design space one has to specify a n a very abstract level. Transforming a specification into a correct implementation is usually an error prone tas...
Alexander Paar, Haitao Du, Nader Bagherzadeh
CASES
2008
ACM
13 years 9 months ago
Multi-granularity sampling for simulating concurrent heterogeneous applications
Detailed or cycle-accurate/bit-accurate (CABA) simulation is a critical phase in the design flow of embedded systems. However, with increasing system complexity, full detailed sim...
Melhem Tawk, Khaled Z. Ibrahim, Smaïl Niar
CODES
2006
IEEE
14 years 1 months ago
System-level power-performance trade-offs in bus matrix communication architecture synthesis
System-on-chip communication architectures have a significant impact on the performance and power consumption of modern multiprocessor system-on-chips (MPSoCs). However, customiza...
Sudeep Pasricha, Young-Hwan Park, Fadi J. Kurdahi,...