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ISCA
2002
IEEE
159views Hardware» more  ISCA 2002»
14 years 11 days ago
Avoiding Initialization Misses to the Heap
This paper investigates a class of main memory accesses (invalid memory traffic) that can be eliminated altogether. Invalid memory traffic is real data traffic that transfers inva...
Jarrod A. Lewis, Mikko H. Lipasti, Bryan Black
ASPLOS
2011
ACM
12 years 11 months ago
Mnemosyne: lightweight persistent memory
New storage-class memory (SCM) technologies, such as phasechange memory, STT-RAM, and memristors, promise user-level access to non-volatile storage through regular memory instruct...
Haris Volos, Andres Jaan Tack, Michael M. Swift
RAID
2010
Springer
13 years 5 months ago
Kernel Malware Analysis with Un-tampered and Temporal Views of Dynamic Kernel Memory
Dynamic kernel memory has been a popular target of recent kernel malware due to the difficulty of determining the status of volatile dynamic kernel objects. Some existing approach...
Junghwan Rhee, Ryan Riley, Dongyan Xu, Xuxian Jian...
LCTRTS
2007
Springer
14 years 1 months ago
Tetris: a new register pressure control technique for VLIW processors
The run-time performance of VLIW (very long instruction word) microprocessors depends heavily on the effectiveness of its associated optimizing compiler. Typical VLIW compiler pha...
Weifeng Xu, Russell Tessier
CIKM
2006
Springer
13 years 11 months ago
Resource-aware kernel density estimators over streaming data
A fundamental building block of many data mining and analysis approaches is density estimation as it provides a comprehensive statistical model of a data distribution. For that re...
Christoph Heinz, Bernhard Seeger