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RV
2007
Springer
100views Hardware» more  RV 2007»
14 years 2 months ago
The Good, the Bad, and the Ugly, But How Ugly Is Ugly?
When monitoring a system wrt. a property defined in some temporal logic, e. g., LTL, a major concern is to settle with an adequate interpretation of observable system events; that...
Andreas Bauer 0002, Martin Leucker, Christian Scha...
IGPL
2008
124views more  IGPL 2008»
13 years 8 months ago
The Ricean Objection: An Analogue of Rice's Theorem for First-order Theories
We propose here an extension of Rice's Theorem to first-order logic, proven by totally elementary means. If P is any property defined over the collection of all first-order t...
Igor Carboni Oliveira, Walter Alexandre Carnielli
ICFCA
2009
Springer
14 years 3 months ago
The Advent of Formal Diagrammatic Reasoning Systems
In knowledge representation and reasoning systems, diagrams have many practical applications and are used in numerous settings. Indeed, it is widely accepted that diagrams are a va...
Frithjof Dau
IEEEPACT
2007
IEEE
14 years 3 months ago
Error Detection Using Dynamic Dataflow Verification
Continued scaling of CMOS technology to smaller transistor sizes makes modern processors more susceptible to both transient and permanent hardware faults. Circuitlevel techniques ...
Albert Meixner, Daniel J. Sorin
SPIN
2004
Springer
14 years 2 months ago
Model-Driven Software Verification
Abstract. In the classic approach to logic model checking, software verification requires a manually constructed artifact (the model) to be written in the language that is accepted...
Gerard J. Holzmann, Rajeev Joshi