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» Tabling for Higher-Order Logic Programming
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CAV
2004
Springer
151views Hardware» more  CAV 2004»
13 years 11 months ago
QB or Not QB: An Efficient Execution Verification Tool for Memory Orderings
We study the problem of formally verifying shared memory multiprocessor executions against memory consistency models--an important step during post-silicon verification of multipro...
Ganesh Gopalakrishnan, Yue Yang, Hemanthkumar Siva...
ICLP
2009
Springer
14 years 8 months ago
Attributed Data for CHR Indexing
Abstract. The overhead of matching CHR rules is alleviated by constraint store indexing. Attributed variables provide an efficient means of indexing on logical variables. Existing ...
Beata Sarna-Starosta, Tom Schrijvers
EGC
2005
Springer
14 years 1 months ago
XDTM: The XML Data Type and Mapping for Specifying Datasets
We are concerned with the following problem: How do we allow a community of users to access and process diverse data stored in many different formats? Standard data formats and da...
Luc Moreau, Yong Zhao, Ian T. Foster, Jens-S. V&ou...
FPL
2009
Springer
99views Hardware» more  FPL 2009»
14 years 12 days ago
Exploiting fast carry-chains of FPGAs for designing compressor trees
Fast carry chains featuring dedicated adder circuitry is a distinctive feature of modern FPGAs. The carry chains bypass the general routing network and are embedded in the logic b...
Hadi Parandeh-Afshar, Philip Brisk, Paolo Ienne
FPGA
1997
ACM
127views FPGA» more  FPGA 1997»
13 years 12 months ago
General Modeling and Technology-Mapping Technique for LUT-Based FPGAs
We present a general approach to the FPGA technology mapping problem that applies to any logic block composed of lookup tables LUTs and can yield optimal solutions. The connecti...
Amit Chowdhary, John P. Hayes