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» Tackling Large State Spaces in Performance Modelling
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CODES
2006
IEEE
14 years 3 months ago
System-level power-performance trade-offs in bus matrix communication architecture synthesis
System-on-chip communication architectures have a significant impact on the performance and power consumption of modern multiprocessor system-on-chips (MPSoCs). However, customiza...
Sudeep Pasricha, Young-Hwan Park, Fadi J. Kurdahi,...
CF
2010
ACM
14 years 8 days ago
Hybrid parallel programming with MPI and unified parallel C
The Message Passing Interface (MPI) is one of the most widely used programming models for parallel computing. However, the amount of memory available to an MPI process is limited ...
James Dinan, Pavan Balaji, Ewing L. Lusk, P. Saday...
VLDB
1990
ACM
128views Database» more  VLDB 1990»
14 years 1 months ago
Advanced Query Processing in Object Bases Using Access Support Relations
Even though the large body of knowledge of relational query optimization techniques can be utilized as a starting point for object-oriented query optimization the full exploitatio...
Alfons Kemper, Guido Moerkotte
JAIR
2006
179views more  JAIR 2006»
13 years 9 months ago
The Fast Downward Planning System
Fast Downward is a classical planning system based on heuristic search. It can deal with general deterministic planning problems encoded in the propositional fragment of PDDL2.2, ...
Malte Helmert
SIGMETRICS
2008
ACM
214views Hardware» more  SIGMETRICS 2008»
13 years 8 months ago
HMTT: a platform independent full-system memory trace monitoring system
Memory trace analysis is an important technology for architecture research, system software (i.e., OS, compiler) optimization, and application performance improvements. Many appro...
Yungang Bao, Mingyu Chen, Yuan Ruan, Li Liu, Jianp...