119 search results - page 12 / 24 » Targeting Tiled Architectures in Design Exploration |
MEMOCODE
2003
IEEE
14 years 25 days ago
2003
IEEE
System-level design methodologies for embedded HW/SW systems face several challenges: In order to be susceptible to systematic formal analysis based on state-space exploration, a ...
VLSID
2005
IEEE
14 years 8 months ago
2005
IEEE
This paper presents a highly efficient processor design methodology based on the LISA 2.0 language. Typically the architecture design phase is dominated by an iterative processor ...
HPCA
1997
IEEE
13 years 11 months ago
1997
IEEE
This paper represents a design study of the datapath for a very long instruction word (VLIW) video signal processor (VSP). VLIW architectures provide high parallelism and excellen...
MOBICOM
2003
ACM
14 years 24 days ago
2003
ACM
The characteristics of ad hoc networks naturally encourage the deployment of distributed services. Although current networks implement group communication methods, they do not sup...
ICS
2009
Tsinghua U.
14 years 4 days ago
2009
Tsinghua U.
New static source routing algorithms for High Performance Computing (HPC) are presented in this work. The target parallel architectures are based on the commonly used fattree netw...