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» Techniques for Formal Verification of Digital Systems: A Sys...
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ASE
2005
137views more  ASE 2005»
13 years 8 months ago
Rewriting-Based Techniques for Runtime Verification
Techniques for efficiently evaluating future time Linear Temporal Logic (abbreviated LTL) formulae on finite execution traces are presented. While the standard models of LTL are i...
Grigore Rosu, Klaus Havelund
CASES
2006
ACM
14 years 2 months ago
Modeling heterogeneous SoCs with SystemC: a digital/MEMS case study
Designers of SoCs with non-digital components, such as analog or MEMS devices, can currently use high-level system design languages, such as SystemC, to model only the digital par...
Ankush Varma, Muhammad Yaqub Afridi, Akin Akturk, ...
FDL
2007
IEEE
14 years 26 days ago
Towards Assertion Based Verification of Analog and Mixed Signal Designs Using PSL
Abstract-- Analog and Mixed Signal (AMS) designs are important integrated systems that link digital circuits to the analog world. Following the success of PSL verification methodol...
Ghiath Al Sammane, Mohamed H. Zaki, Zhi Jie Dong, ...
INFORMATICALT
2002
103views more  INFORMATICALT 2002»
13 years 8 months ago
Numerical Representations as Purely Functional Data Structures: a New Approach
This paper is concerned with design, implementation and verification of persistent purely functional data structures which are motivated by the representation of natural numbers us...
Mirjana Ivanovic, Viktor Kuncak
AGTIVE
2007
Springer
14 years 1 months ago
Visualization, Simulation and Analysis of Reconfigurable Systems
Meta-modeling is well known to define the basic concepts of domain-specific languages in an object-oriented way. Based on graph transformation, an abstract meta-model may be enhanc...
Claudia Ermel, Karsten Ehrig