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ASPDAC
2012
ACM
253views Hardware» more  ASPDAC 2012»
12 years 3 months ago
An integrated and automated memory optimization flow for FPGA behavioral synthesis
Behavioral synthesis tools have made significant progress in compiling high-level programs into register-transfer level (RTL) specifications. But manually rewriting code is still ...
Yuxin Wang, Peng Zhang, Xu Cheng, Jason Cong
OOPSLA
2007
Springer
14 years 1 months ago
Scalable omniscient debugging
Omniscient debuggers make it possible to navigate backwards in time within a program execution trace, drastically improving the task of debugging complex applications. Still, they...
Guillaume Pothier, Éric Tanter, José...
IWPSE
2005
IEEE
14 years 1 months ago
EvoLens: Lens-View Visualizations of Evolution Data
Visualizing software evolution is essential for identifying design erosions that have occurred over the past releases. Making evolutionary aspects explicit via visual representati...
Jacek Ratzinger, Michael Fischer, Harald Gall
LCPC
2001
Springer
14 years 8 days ago
A Comparative Evaluation of Parallel Garbage Collector Implementations
While uniprocessor garbage collection is relatively well understood, experience with collectors for large multiprocessor servers is limited and it is unknown which techniques best ...
C. Richard Attanasio, David F. Bacon, Anthony Cocc...
LCTRTS
2005
Springer
14 years 1 months ago
Preventing interrupt overload
Performance guarantees can be given to tasks in an embedded system by ensuring that access to each shared resource is mediated by an appropriate scheduler. However, almost all pre...
John Regehr, Usit Duongsaa