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FPGA
2001
ACM
145views FPGA» more  FPGA 2001»
14 years 4 days ago
Simultaneous logic decomposition with technology mapping in FPGA designs
Conventional technology mapping algorithms for SRAM-based Field Programmable Gate Arrays (FPGAs) are normally carried out on a fixed logic decomposition of a circuit. The impact o...
Gang Chen, Jason Cong
ISAAC
2001
Springer
123views Algorithms» more  ISAAC 2001»
14 years 2 days ago
Labeling Subway Lines
Abstract. Graphical features on map, charts, diagrams and graph drawings usually must be annotated with text labels in order to convey their meaning. In this paper we focus on a pr...
Maria Angeles Garrido, Claudia Iturriaga, Alberto ...
ACSAC
2000
IEEE
14 years 2 days ago
A Novel Approach to On-Line Status Authentication of Public-Key Certificates
The widespread use of public networks, such as the Internet, for the exchange of sensitive data, like legally valid documents and business transactions, poses severe security cons...
Eugenio Faldella, Marco Prandini
ICPPW
2000
IEEE
14 years 1 days ago
Challenges in URL Switching for Implementing Globally Distributed Web Sites
URL, or layer-5, switches can be used to implement locally and globally distributed web sites. URL switches must be able to exploit knowledge of server load and content (e.g., of ...
Zornitza Genova, Kenneth J. Christensen
IPPS
2000
IEEE
14 years 1 days ago
Switch Scheduling in the Multimedia Router (MMR)
The primary goal of the Multimedia Router (MMR) project is the design and implementation of a router optimized for multimedia applications. The router is targeted for use in clust...
Damon S. Love, Sudhakar Yalamanchili, José ...