909 search results - page 145 / 182 » Temporal Logic Case Study |
ICDE
2006
IEEE
14 years 2 months ago
2006
IEEE
The growing sophistication and diversity of malicious activity in the Internet presents a serious challenge for network security analysts. In this paper, we describe our efforts t...
AAAI
2012
11 years 11 months ago
2012
Widespread accounts of the harmful effects of invasive species have stimulated both practical and theoretical studies on how the spread of these destructive agents can be containe...
DAC
2007
ACM
14 years 9 months ago
2007
ACM
This paper presents a variation resilient circuit design technique for maintaining parametric yield of design under inherent variation in process parameters. We propose to utilize...
KBSE
2005
IEEE
14 years 2 months ago
2005
IEEE
In test generation based on model-checking, white-box test criteria are represented as trap conditions written in a temporal logic. A model checker is used to refute trap conditio...
IFM
2004
Springer
14 years 2 months ago
2004
Springer
Abstract. We present a framework for model checking concurrent software systems which incorporates both states and events. Contrary to other state/event approaches, our work also i...