4 search results - page 1 / 1 » Test Set Stripping Limiting the Maximum Number of Specified ... |
DELTA
2008
IEEE
14 years 23 days ago
2008
IEEE
This paper presents a technique that limits the maximum number of specified bits of any pattern in a given test set. The outlined method uses algorithms similar to ATPG, but explo...
ISQED
2003
IEEE
14 years 4 months ago
2003
IEEE
An algorithm for mapping core terminals to System-On-a-Chip (SOC) I/O pins and scheduling tests in order to achieve costefficient concurrent test for core-based designs is present...
DFT
2005
IEEE
14 years 28 days ago
2005
IEEE
Linear decompressors are the dominant methodology used in commercial test data compression tools. However, they are generally not able to exploit correlations in the test data, an...
CONSTRAINTS
2007
13 years 11 months ago
2007
In the ECAD area, the Test Generation (TG) problem consists in finding an input vector test for some possible diagnosis (a set of faults) of a digital circuit. Such tests may have ...