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VTS
1997
IEEE
86views Hardware» more  VTS 1997»
13 years 12 months ago
Methods to reduce test application time for accumulator-based self-test
Accumulators based on addition or subtraction can be used as test pattern generators. Some circuits, however, require long test lengths if the parameters of the accumulator are no...
Albrecht P. Stroele, Frank Mayer
EDBT
2010
ACM
136views Database» more  EDBT 2010»
14 years 24 days ago
Minimizing database repros using language grammars
Database engines and database-centric applications have become complex software systems. Ensuring bug-free database services is therefore a very difficult task. Whenever possible...
Nicolas Bruno
EURODAC
1995
IEEE
164views VHDL» more  EURODAC 1995»
13 years 11 months ago
Bottleneck removal algorithm for dynamic compaction and test cycles reduction
: We present a new, dynamic algorithm for test sequence compaction and test cycle reduction for combinationaland sequential circuits. Several dynamic algorithms for compaction in c...
Srimat T. Chakradhar, Anand Raghunathan
ICCAD
2006
IEEE
113views Hardware» more  ICCAD 2006»
14 years 4 months ago
Layer minimization of escape routing in area array packaging
We devise a central triangular sequence to minimize the escape routing layers in area array packaging. We use a network flow model to analyze the bottleneck of the routable pins. ...
Renshen Wang, Rui Shi, Chung-Kuan Cheng
MIAR
2006
IEEE
14 years 1 months ago
Tracking of Instruments in Minimally Invasive Surgery for Surgical Skill Analysis
Intraoperative assistance systems aim to improve the quality of the surgery and enhance the surgeon’s capabilities. Preferable would be a system which provides support depending ...
Stefanie Speidel, Michael Delles, Carsten Gutt, R&...