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» Testing Digital Circuits with Constraints
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IFIP
2001
Springer
14 years 2 months ago
Random Adjacent Sequences: An Efficient Solution for Logic BIST
: High defect coverage requires good coverage of different fault types. In this paper, we present a comprehensive test vector generation technique for BIST, called Random Single In...
René David, Patrick Girard, Christian Landr...
CADUI
2004
13 years 11 months ago
Building Rich User Interfaces for Digital Talking Books
: This paper presents a framework for the automatic production of Digital Talking Books (DTB). The production process converts existing audio tapes and OCR-based digitalization of ...
Luís Carriço, Carlos Duarte, Rui Lop...
MHCI
2009
Springer
14 years 4 months ago
Hands on music: physical approach to interaction with digital music
Mobile users listen to large digital music libraries with thousands of songs. Browsing such libraries in mobile contexts is difficult due to constraints of the context and devices...
Janne Bergman, Jarmo Kauko, Jaakko Keränen
MEMOCODE
2007
IEEE
14 years 4 months ago
Combining Multi-Valued Logics in SAT-based ATPG for Path Delay Faults
Due to the rapidly growing speed and the decreasing size of gates in modern chips, the probability of faults caused by the production process grows. Already small variations lead ...
Stephan Eggersglüß, Görschwin Fey,...
IJCNN
2006
IEEE
14 years 3 months ago
In Situ Training of CMOL CrossNets
—— Hybrid semiconductor/nanodevice (“CMOL”) technology may allow the implementation of digital and mixed-signal integrated circuits, including artificial neural networks (...
Jung Hoon Lee, Konstantin Likharev