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EURODAC
1994
IEEE
130views VHDL» more  EURODAC 1994»
14 years 8 days ago
RESIST: a recursive test pattern generation algorithm for path delay faults
This paper presents Resist, a recursive test pattern generation (TPG) algorithm for path delay fault testing of scan-based circuits. In contrast to other approaches, it exploits t...
Karl Fuchs, Michael Pabst, Torsten Rössel
JAVACARD
2000
13 years 11 months ago
Automatic Test Generation for Java-Card Applets
: Open-cards have introduced a new life cycle for smart card embedded applications. In the case of Java Card, they have raised the problem of embedded object-oriented applet valida...
Hugues Martin, Lydie du Bousquet
FMICS
2008
Springer
13 years 9 months ago
Extending Structural Test Coverage Criteria for Lustre Programs with Multi-clock Operators
Lustre is a formal synchronous declarative language widely used for modeling and specifying safety-critical applications in the elds of avionics, transportation or energy productio...
Virginia Papailiopoulou, Laya Madani, Lydie du Bou...
TCAD
2002
134views more  TCAD 2002»
13 years 7 months ago
Testing and diagnosis of interconnect faults in cluster-based FPGA architectures
As IC densities are increasing, cluster-based FPGA architectures are becoming the architecture of choice for major FPGA manufacturers. A cluster-based architecture is one in which...
Ian G. Harris, Russell Tessier
FLAIRS
2009
13 years 6 months ago
Unit Testing for Qualitative Spatial and Temporal Reasoning
Researchers in commonsense, qualitative spatial and temporal reasoning (QSTR) provide flexible and intuitive methods for reasoning about vague and uncertain information including ...
Carl P. L. Schultz, Robert Amor, Hans W. Guesgen