This paper describes novel methods of exploiting the partial, dynamic reconfiguration capabilities of Xilinx Virtex V1000 FPGAs to manage single-event upset (SEU) faults due to rad...
Maya Gokhale, Paul Graham, Michael J. Wirthlin, Da...
: For the new parallel implementation of electronic structure methods in ACES III (Lotrich et al., in preparation) the present state-of-the-art algorithms for the evaluation of ele...
Transmitting voice through IP data network can provide significant cost savings. However if not managed properly, voice quality can degrade due to data network congestion. Voice o...
This is to present work on modifying the Aleph ILP system so that it evaluates the hypothesised clauses in parallel by distributing the data-set among the nodes of a parallel or di...
The research work is carried out to enhance the recognition accuracy of neural network with Phase Only Correlation (POC) and reduce the time required for POC by refining its input...