In this paper we investigate optimal voltage testing approaches for physically-based faults in CMOS circuits. We describe the general nature of the problem and then focus on two f...
Abstract. This paper presents a technique that uses code to automatically generate its own test cases at run-time by using a combination of symbolic and concrete (i.e., regular) ex...
Measuring and comparing performance, cost, and other features of advanced communication architectures for complex multi core/multiprocessor systems on chip is a significant challe...
ABSTRACT. Risks associated with change in technology standards and uncertainty over the sharing of costs and benefits among trading partners impede interorganizational information ...
This paper tests the hypothesis that generic recovery techniques, such as process pairs, can survive most application faults without using application-specific information. We ex...