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» Testing from Formal Specifications, a Generic Approach
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ICSEA
2007
IEEE
14 years 1 months ago
Test Data Generation from UML State Machine Diagrams using GAs
Automatic test data generation helps testers to validate software against user requirements more easily. Test data can be generated from many sources; for example, experience of t...
Chartchai Doungsa-ard, Keshav P. Dahal, M. Alamgir...
FAC
2008
80views more  FAC 2008»
13 years 7 months ago
Verification of Mondex electronic purses with KIV: from transactions to a security protocol
The Mondex case study about the specification and refinement of an electronic purse as defined in the Oxford Technical Monograph PRG-126 has recently been proposed as a challenge f...
Dominik Haneberg, Gerhard Schellhorn, Holger Grand...
FAC
2008
97views more  FAC 2008»
13 years 7 months ago
A functional formalization of on chip communications
This paper presents a formal model and a systematic approach to the validation of communication tures at a high level of abstraction. This model is described mathematically by a fu...
Julien Schmaltz, Dominique Borrione
ICSEA
2006
IEEE
14 years 1 months ago
Testing a Network by Inferring Representative State Machines from Network Traces
— This paper describes an innovative approach to network testing based on automatically generating and analyzing state machine models of network behavior. The models are generate...
Nancy D. Griffeth, Yuri Cantor, Constantinos Djouv...
LPNMR
2001
Springer
14 years 1 days ago
plp: A Generic Compiler for Ordered Logic Programs
Abstract This paper describes a generic compiler, called plp, for translating ordered logic programs into standard logic programs under the answer set semantics. In an ordered logi...
James P. Delgrande, Torsten Schaub, Hans Tompits