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» Testing implementations of transactional memory
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ASPLOS
1992
ACM
13 years 11 months ago
Closing the Window of Vulnerability in Multiphase Memory Transactions
Multiprocessor architects have begun to explore several mechanisms such as prefetching, context-switching and software-assisted dynamic cache-coherence, which transform single-pha...
John Kubiatowicz, David Chaiken, Anant Agarwal
IPPS
2010
IEEE
13 years 4 months ago
Clustering JVMs with software transactional memory support
Affordable transparent clustering solutions to scale non-HPC applications on commodity clusters (such as Terracotta) are emerging for Java Virtual Machines (JVMs). Working in this ...
Christos Kotselidis, Mikel Luján, Mohammad ...
IEEEPACT
2009
IEEE
14 years 2 months ago
Mapping Out a Path from Hardware Transactional Memory to Speculative Multithreading
— This research demonstrates that coming support for hardware transactional memory can be leveraged to significantly reduce the cost of implementing true speculative multithread...
Leo Porter, Bumyong Choi, Dean M. Tullsen
PPOPP
2006
ACM
14 years 1 months ago
McRT-STM: a high performance software transactional memory system for a multi-core runtime
Applications need to become more concurrent to take advantage of the increased computational power provided by chip level multiprocessing. Programmers have traditionally managed t...
Bratin Saha, Ali-Reza Adl-Tabatabai, Richard L. Hu...
ISCA
2007
IEEE
149views Hardware» more  ISCA 2007»
14 years 1 months ago
An effective hybrid transactional memory system with strong isolation guarantees
We propose signature-accelerated transactional memory (SigTM), a hybrid TM system that reduces the overhead of software transactions. SigTM uses hardware signatures to track the r...
Chi Cao Minh, Martin Trautmann, JaeWoong Chung, Au...