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» Testing implementations of transactional memory
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VLSID
1997
IEEE
135views VLSI» more  VLSID 1997»
14 years 2 months ago
Parallel Genetic Algorithms for Simulation-Based Sequential Circuit Test Generation
The problem of test generation belongs to the class of NP-complete problems and it is becoming more and more di cult as the complexity of VLSI circuits increases, and as long as e...
Dilip Krishnaswamy, Michael S. Hsiao, Vikram Saxen...
NCI
2004
198views Neural Networks» more  NCI 2004»
13 years 11 months ago
A "spiking" bidirectional associative memory for modeling intermodal priming
Starting from a modular artificial neural system modelling the integration of several perceptive stimuli, this article proposes a new implementation of the central module performi...
David Meunier, Hélène Paugam-Moisy
CCECE
2006
IEEE
14 years 4 months ago
Hardware Edge Detection using an Altera Stratix NIOS2 Development Kit
— Edge detection is a computer vision algorithm that is very processor intensive. It is possible to increase the speed of the algorithm by using hardware parallelism. This paper ...
Jay Kraut
SEFM
2008
IEEE
14 years 4 months ago
A Fast Algorithm to Compute Heap Memory Bounds of Java Card Applets
We present an approach to find upper bounds of heap space for Java Card applets. Our method first transforms an input bytecode stream into a control flow graph (CFG), and then ...
Tuan-Hung Pham, Anh-Hoang Truong, Ninh-Thuan Truon...
IPPS
1998
IEEE
14 years 2 months ago
Memory Space Representation for Heterogeneous Network Process Migration
A major difficulty of heterogeneous process migration is how to collect advanced dynamic data-structures, transform them into machine independent form, and restor them appropriate...
Kasidit Chanchio, Xian-He Sun