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ITNG
2008
IEEE
14 years 2 months ago
Parallel FFT Algorithms on Network-on-Chips
This paper presents several parallel FFT algorithms with different degree of communication overhead for multiprocessors in Network-on-Chip(NoC) environment. Three different method...
Jun Ho Bahn, Jungsook Yang, Nader Bagherzadeh
IPPS
2007
IEEE
14 years 2 months ago
Fast SEU Detection and Correction in LUT Configuration Bits of SRAM-based FPGAs
1 FPGAs are an appealing solution for the space-based remote sensing applications. However, in a low-earth orbit, configuration bits of SRAM-based FPGAs are susceptible to single-e...
Hamid R. Zarandi, Seyed Ghassem Miremadi, Costas A...
ISBI
2007
IEEE
14 years 2 months ago
Design and Calibration of a Virtual Tomographic Reflection System
Virtual Tomographic Reflection (VTR) is a new augmented reality technique that allows users to view volumetric image data using an interaction paradigm based on medical ultrasoun...
Damion Shelton, Bing Wu, Roberta L. Klatzky, Georg...
IEEEPACT
2006
IEEE
14 years 1 months ago
Whole-program optimization of global variable layout
On machines with high-performance processors, the memory system continues to be a performance bottleneck. Compilers insert prefetch operations and reorder data accesses to improve...
Nathaniel McIntosh, Sandya Mannarswamy, Robert Hun...
DFT
2005
IEEE
109views VLSI» more  DFT 2005»
14 years 1 months ago
Hardware Testing For Error Tolerant Multimedia Compression based on Linear Transforms
In this paper, we propose a system-level error tolerance scheme for systems where a linear transform is combined with quantization. These are key components in multimedia compress...
In Suk Chong, Antonio Ortega