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DATE
2007
IEEE
99views Hardware» more  DATE 2007»
14 years 2 months ago
Instruction trace compression for rapid instruction cache simulation
Modern Application Specific Instruction Set Processors (ASIPs) have customizable caches, where the size, associativity and line size can all be customized to suit a particular ap...
Andhi Janapsatya, Aleksandar Ignjatovic, Sri Param...
CORR
2007
Springer
127views Education» more  CORR 2007»
13 years 8 months ago
Common Reusable Verification Environment for BCA and RTL Models
This paper deals with a common verification methodology and environment for SystemC BCA and RTL models. The aim is to save effort by avoiding the same work done twice by different...
Giuseppe Falconeri, Walid Naifer, Nizar Romdhane
ICST
2009
IEEE
13 years 5 months ago
An Evaluation of Model Checkers for Specification Based Test Case Generation
Under certain constraints the test case generation problem can be represented as a model checking problem, thus enabling the use of powerful model checking tools to perform the te...
Gordon Fraser, Angelo Gargantini
ICSE
2003
IEEE-ACM
14 years 8 months ago
An Empirical Study of an Informal Knowledge Repository in a Medium-Sized Software Consulting Company
Numerous studies have been conducted on design and architecture of knowledge repositories. This paper addresses the need for looking at practices where knowledge repositories are ...
Emil Røyrvik, Torgeir Dingsøyr
ICST
2008
IEEE
14 years 2 months ago
A Metamodel for the Measurement of Object-Oriented Systems: An Analysis using Alloy
This paper presents a MOF-compliant metamodel for calculating software metrics and demonstrates how it is used to generate a metrics tool that calculates coupling and cohesion met...
Jacqueline A. McQuillan, James F. Power