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CODES
2008
IEEE
14 years 3 months ago
Static analysis for fast and accurate design space exploration of caches
Application-specific system-on-chip platforms create the opportunity to customize the cache configuration for optimal performance with minimal chip estate. Simulation, in partic...
Yun Liang, Tulika Mitra
JPDC
2010
106views more  JPDC 2010»
13 years 7 months ago
Feedback-directed page placement for ccNUMA via hardware-generated memory traces
Non-uniform memory architectures with cache coherence (ccNUMA) are becoming increasingly common, not just for large-scale high performance platforms but also in the context of mul...
Jaydeep Marathe, Vivek Thakkar, Frank Mueller
IPPS
2003
IEEE
14 years 2 months ago
So Many States, So Little Time: Verifying Memory Coherence in the Cray X1
This paper investigates a complexity-effective technique for verifying a highly distributed directory-based cache coherence protocol. We develop a novel approach called “witnes...
Dennis Abts, Steve Scott, David J. Lilja
RV
2010
Springer
153views Hardware» more  RV 2010»
13 years 7 months ago
Run-Time Verification of Networked Software
Most applications that are in use today inter-operate with other applications, so-called peers, over a network. The analysis of such distributed applications requires that the effe...
Cyrille Valentin Artho
WEBDB
2009
Springer
112views Database» more  WEBDB 2009»
14 years 3 months ago
Querying DAG-shaped Execution Traces Through Views
The question whether a given set of views, defined by queries, can be used to answer another query, arises in several contexts such as query optimization, data integration and se...
Maya Ben-Ari, Tova Milo, Elad Verbin