217 search results - page 18 / 44 » The Block-Based Trace Cache |
RT
2001
Springer
14 years 1 months ago
2001
Springer
Abstract. Many disciplines must handle the creation, visualization, and manipulation of huge and complex 3D environments. Examples include large structural and mechanical engineeri...
IPPS
2000
IEEE
14 years 1 months ago
2000
IEEE
In a machine that follows the dynamically trace scheduled VLIW (DTSVLIW) architecture, VLIW instructions are built dynamically through an algorithm that can be implemented in hard...
CGF
2008
13 years 9 months ago
2008
We present the Memory Trace Visualizer (MTV), a tool that provides interactive visualization and analysis of the sequence of memory operations performed by a program as it runs. A...
EGH
2010
Springer
13 years 7 months ago
2010
Springer
This paper proposes a massively parallel hardware architecture for efficient tracing of incoherent rays, e.g. for global illumination. The general approach is centered around hier...
WWW
2002
ACM
14 years 9 months ago
2002
ACM
Aliasing occurs in Web transactions when requests containing different URLs elicit replies containing identical data payloads. Conventional caches associate stored data with URLs ...