Sciweavers

323 search results - page 16 / 65
» The Case for High Level Programming Models for Reconfigurabl...
Sort
View
IPPS
2003
IEEE
15 years 8 months ago
Targeting Tiled Architectures in Design Exploration
Tiled architectures can provide a model for early estimation of global interconnect costs. A design exploration tool for reconfigurable architectures is currently under developmen...
Lilian Bossuet, Wayne Burleson, Guy Gogniat, Vikas...
USENIX
2001
15 years 4 months ago
User-Level Checkpointing for LinuxThreads Programs
Multiple threads running in a single, shared address space is a simple model for writing parallel programs for symmetric multiprocessor (SMP) machines and for overlapping I/O and ...
William R. Dieter, James E. Lumpp Jr.
JMLR
2012
13 years 5 months ago
Structured Output Learning with High Order Loss Functions
Often when modeling structured domains, it is desirable to leverage information that is not naturally expressed as simply a label. Examples include knowledge about the evaluation ...
Daniel Tarlow, Richard S. Zemel
PODC
2009
ACM
16 years 10 days ago
Memory models: a case for rethinking parallel languages and hardware
The era of parallel computing for the masses is here, but writing correct parallel programs remains far more difficult than writing sequential programs. Aside from a few domains,...
Sarita V. Adve
JVA
2006
IEEE
15 years 9 months ago
Programming Models for Grid Applications and Systems: Requirements and Approaches
History repeats itself. Since the invention of the programmable computer, numerous computer scientists keep dedicating their professional lives to the design of “the single, bes...
Thilo Kielmann