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ISPASS
2009
IEEE
14 years 2 months ago
WARP: Enabling fast CPU scheduler development and evaluation
Abstract—Developing CPU scheduling algorithms and understanding their impact in practice can be difficult and time consuming due to the need to modify and test operating system ...
Haoqiang Zheng, Jason Nieh
FCCM
2009
IEEE
148views VLSI» more  FCCM 2009»
14 years 2 months ago
A Packet Generator on the NetFPGA Platform
— A packet generator and network traffic capture system has been implemented on the NetFPGA. The NetFPGA is an open networking platform accelerator that enables rapid developmen...
G. Adam Covington, Glen Gibb, John W. Lockwood, Ni...
KBSE
2009
IEEE
14 years 2 months ago
A Petri Net Based Debugging Environment for QVT Relations
—In the Model-Driven Architecture (MDA) paradigm the Query/View/Transformation (QVT) standard plays a vital role for model transformations. Especially the high-level declarative ...
Manuel Wimmer, Gerti Kappel, Johannes Schönb&...
PASTE
1999
ACM
13 years 11 months ago
Identifying Procedural Structure in Cobol Programs
The principal control-flow abstraction mechanism in the Cobol language is the PERFORM statement. Normally, PERFORM statements are used in a straightforward manner to define para...
John Field, G. Ramalingam
BMCBI
2010
155views more  BMCBI 2010»
13 years 7 months ago
BISMA - Fast and accurate bisulfite sequencing data analysis of individual clones from unique and repetitive sequences
Background: Bisulfite sequencing is a popular method to analyze DNA methylation patterns at high resolution. A region of interest is targeted by PCR and about 20-50 subcloned DNA ...
Christian Rohde, Yingying Zhang, Richard Reinhardt...