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EURODAC
1994
IEEE
127views VHDL» more  EURODAC 1994»
14 years 1 months ago
Optimal equivalent circuits for interconnect delay calculations using moments
In performance-driven interconnect design, delay estimators are used to determine both the topology and the layout of good routing trees. We address the class of moment-matching, ...
Sudhakar Muddu, Andrew B. Kahng
TIME
1994
IEEE
14 years 1 months ago
An Algebraic Formulation of Temporal Knowledge for Reasoning about Recurring Events
We formulate an algebra of binary temporal relations between events the number of occurrences of which is unknown, but which are known to recur in time. Ontologically, we view the...
Robert A. Morris, William D. Shoaff, Lina Khatib
PLDI
2010
ACM
14 years 1 months ago
Bringing Extensibility to Verified Compilers
Verified compilers, such as Leroy's CompCert, are accompanied by a fully checked correctness proof. Both the compiler and proof are often constructed with an interactive proo...
Zachary Tatlock, Sorin Lerner
ICALP
1992
Springer
14 years 1 months ago
Near-perfect Token Distribution
Suppose that n tokens are arbitrarily placed on the n nodes of a graph. At each parallel step one token may be moved from each node to an adjacent node. An algorithm for the near-...
Andrei Z. Broder, Alan M. Frieze, Eli Shamir, Eli ...
CTRS
1990
14 years 1 months ago
Completion Procedures as Semidecision Procedures
Completion procedures, originated from the seminal work of Knuth and Bendix, are wellknown as procedures for generating confluent rewrite systems, i.e. decision procedures for al ...
Maria Paola Bonacina, Jieh Hsiang
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