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ISCAS
2005
IEEE
14 years 1 months ago
2005
IEEE
— In this paper, we propose an interconnect-driven framework that performs an efficient and effective design space exploration for deep submicron processor architecture design. ...
ISCAS
2003
IEEE
14 years 24 days ago
2003
IEEE
This paper presents an Integrated Framework of Design Optimization and Space Minimization (IDOM) for generating the minimum number of functional units with schedule length and mem...
DAC
2010
ACM
13 years 7 months ago
2010
ACM
Given the increasing complexity of multi-processor systems-onchip, a wide range of parameters must be tuned to find the best trade-offs in terms of the selected system figures of ...
CODES
2003
IEEE
14 years 25 days ago
2003
IEEE
In this paper, we are concerned about the performance estimation of bus-based architectures assuming that the task partitioning on the processing components is already determined....
IPPS
2000
IEEE
13 years 12 months ago
2000
IEEE
The switch design for interconnection networks plays an important role in the overall performance of multiprocessors and computer networks. It is therefore crucial to study variou...