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» The Design and Analysis of Parallel Algorithms
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ICCV
2009
IEEE
15 years 2 months ago
On optimizing subspaces for face recognition
We propose a subspace learning algorithm for face recognition by directly optimizing recognition performance scores. Our approach is motivated by the following observations: 1) Di...
Jilin Tu, Xiaoming Liu, Peter Henry Tu
DFT
2006
IEEE
203views VLSI» more  DFT 2006»
15 years 10 months ago
Self Testing SoC with Reduced Memory Requirements and Minimized Hardware Overhead
This paper describes a methodology of creating a built-in diagnostic system of a System on Chip and experimental results of the system application on the AT94K FPSLIC with cores d...
Ondrej Novák, Zdenek Plíva, Jiri Jen...
GECCO
2005
Springer
189views Optimization» more  GECCO 2005»
15 years 10 months ago
Molecular programming: evolving genetic programs in a test tube
We present a molecular computing algorithm for evolving DNA-encoded genetic programs in a test tube. The use of synthetic DNA molecules combined with biochemical techniques for va...
Byoung-Tak Zhang, Ha-Young Jang
DEBS
2003
ACM
15 years 9 months ago
MJoin: a metadata-aware stream join operator
Join algorithms must be re-designed when processing stream data instead of persistently stored data. Data streams are potentially infinite and the query result is expected to be ...
Luping Ding, Elke A. Rundensteiner, George T. Hein...
INFOCOM
2002
IEEE
15 years 9 months ago
Towards Simple, High-performance Schedulers for High-aggregate Bandwidth Switches
— High-aggregate bandwidth switches are those whose port count multiplied by the operating line rate is very high; for example, a 30 port switch operating at 40 Gbps or a 1000 po...
Paolo Giaccone, Balaji Prabhakar, Devavrat Shah