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» The Design and Performance of a Conflict-Avoiding Cache
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HPCA
2011
IEEE
14 years 9 months ago
Calvin: Deterministic or not? Free will to choose
Most shared memory systems maximize performance by unpredictably resolving memory races. Unpredictable memory races can lead to nondeterminism in parallel programs, which can suff...
Derek Hower, Polina Dudnik, Mark D. Hill, David A....
APSCC
2010
IEEE
15 years 3 months ago
A Multicore-Aware Runtime Architecture for Scalable Service Composition
Middleware for web service orchestration, such as runtime engines for executing business processes, workflows, or web service compositions, can easily become performance bottleneck...
Daniele Bonetta, Achille Peternier, Cesare Pautass...
SIGCOMM
2009
ACM
16 years 7 days ago
Optimizing the BSD routing system for parallel processing
The routing architecture of the original 4.4BSD [3] kernel has been deployed successfully without major design modification for over 15 years. In the unified routing architectur...
Qing Li, Kip Macy
SOSP
2009
ACM
16 years 2 months ago
Better I/O through byte-addressable, persistent memory
Modern computer systems have been built around the assumption that persistent storage is accessed via a slow, block-based interface. However, new byte-addressable, persistent memo...
Jeremy Condit, Edmund B. Nightingale, Christopher ...
ICS
2007
Tsinghua U.
15 years 12 months ago
Optimization of data prefetch helper threads with path-expression based statistical modeling
This paper investigates helper threads that improve performance by prefetching data on behalf of an application’s main thread. The focus is data prefetch helper threads that lac...
Tor M. Aamodt, Paul Chow