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» The Design and Performance of a Conflict-Avoiding Cache
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ICS
2001
Tsinghua U.
15 years 10 months ago
Integrating superscalar processor components to implement register caching
A large logical register file is important to allow effective compiler transformations or to provide a windowed space of registers to allow fast function calls. Unfortunately, a l...
Matt Postiff, David Greene, Steven E. Raasch, Trev...
NOCS
2007
IEEE
16 years 11 days ago
The Power of Priority: NoC Based Distributed Cache Coherency
The paper introduces Network-on-Chip (NoC) design methodology and low cost mechanisms for supporting efficient cache access and cache coherency in future high-performance Chip Mul...
Evgeny Bolotin, Zvika Guz, Israel Cidon, Ran Ginos...
167
Voted
VEE
2006
ACM
116views Virtualization» more  VEE 2006»
16 years 1 days ago
Relative factors in performance analysis of Java virtual machines
Many new Java runtime optimizations report relatively small, single-digit performance improvements. On modern virtual and actual hardware, however, the performance impact of an op...
Dayong Gu, Clark Verbrugge, Etienne M. Gagnon
166
Voted
EUROPAR
2003
Springer
15 years 11 months ago
Obtaining Hardware Performance Metrics for the BlueGene/L Supercomputer
Hardware performance monitoring is the basis of modern performance analysis tools for application optimization. We are interested in providing such performance analysis tools for t...
Pedro Mindlin, José R. Brunheroto, Luiz De ...
ENTCS
2007
114views more  ENTCS 2007»
15 years 6 months ago
Parametric Performance Contracts for Software Components with Concurrent Behaviour
Performance prediction methods for component-based software systems aim at supporting design decisions of software architects during early development stages. With the increased a...
Jens Happe, Heiko Koziolek, Ralf Reussner