867 search results - page 97 / 174 » The Design and Performance of a Conflict-Avoiding Cache |
146
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IEEEPACT
2006
IEEE
16 years 4 days ago
2006
IEEE
Modern out-of-order processors with non-blocking caches exploit Memory-Level Parallelism (MLP) by overlapping cache misses in a wide instruction window. The exploitation of MLP, h...
167
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USENIX
2007
15 years 8 months ago
2007
Virtual machine (VM) memory allocation and VM consolidation can benefit from the prediction of VM page miss rate at each candidate memory size. Such prediction is challenging for...
174
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ISCA
1993
IEEE
15 years 10 months ago
1993
IEEE
The distribution of resources among processors, memory and caches is a crucial question faced by designers of large-scale parallel machines. If a machine is to solve problems with...
154
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INFOCOM
2002
IEEE
15 years 11 months ago
2002
IEEE
This paper sketches the design, and presents a scalability analysis and evaluation of NLS, a scalable naming and location service. NLS resolves textual names to the nearest of a s...
196
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JCST
2010
15 years 4 months ago
2010
Abstract This paper introduces a caching technique based on a volumetric representation that captures low-frequency indirect illumination. This structure is intended for efficient ...