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ECRTS
2003
IEEE
14 years 19 days ago
Schedulability Analysis for Distributed Heterogeneous Time/Event Triggered Real-Time Systems
This paper deals with specific issues related to the design of distributed embedded systems implemented with mixed, event-triggered and time-triggered task sets, which communicate...
Traian Pop, Petru Eles, Zebo Peng
CODES
2002
IEEE
14 years 9 days ago
Holistic scheduling and analysis of mixed time/event-triggered distributed embedded systems
This paper deals with specific issues related to the design of distributed embedded systems implemented with mixed, eventtriggered and time-triggered task sets, which communicate ...
Traian Pop, Petru Eles, Zebo Peng
WSC
1997
13 years 8 months ago
Integration of Simulation with Enterprise Models
The Enterprise Modeling Framework (EMF) consists of a methodology for modeling the three major facets of an enterprise, viz., function, information and dynamics. Its main goal is ...
Krishnamurthy Srinivasan, Sundaresan Jayaraman
ISCA
1991
IEEE
110views Hardware» more  ISCA 1991»
13 years 11 months ago
Dynamic Base Register Caching: A Technique for Reducing Address Bus Width
When address reference streams exhibit high degrees of spatial and temporal locality, many of the higher order address lines carry redundant information. By caching the higher ord...
Matthew K. Farrens, Arvin Park
TVLSI
2008
164views more  TVLSI 2008»
13 years 7 months ago
Dynamically Configurable Bus Topologies for High-Performance On-Chip Communication
The on-chip communication architecture is a major determinant of overall performance in complex System-on-Chip (SoC) designs. Since the communication requirements of SoC components...
Krishna Sekar, Kanishka Lahiri, Anand Raghunathan,...