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HYBRID
2010
Springer
13 years 11 months ago
Safe compositional network sketches: formal framework
NetSketch is a tool for the specification of constrained-flow applications and the certification of desirable safety properties imposed thereon. NetSketch assists system integr...
Azer Bestavros, Assaf J. Kfoury, Andrei Lapets, Mi...
SAINT
2002
IEEE
13 years 11 months ago
A Design of a Next Generation IX using MPLS Technology
An IX (Internet eXchange) is a mechanism to interconnect many networks to each other. Currently, an ISP (Internet Service Provider) establishes numerous interconnections to other ...
Ikuo Nakagawa, Hiroshi Esaki, Kenichi Nagami
ECAI
2000
Springer
13 years 11 months ago
Autosteve: Automated Electrical Design Analysis
AutoSteve performs automated electrical design based on qualitative simulation and functional abstraction. It is the first commercial product capable of performing these tasks for ...
Chris Price
RTSS
1999
IEEE
13 years 11 months ago
Design and Implementation of Statistical Rate Monotonic Scheduling in KURT Linux
Statistical Rate Monotonic Scheduling (SRMS) is a generalization of the classical RMS results of Liu and Layland [LL73] for periodic tasks with highly variable execution times and...
Alia Atlas, Azer Bestavros
FPGA
1999
ACM
139views FPGA» more  FPGA 1999»
13 years 11 months ago
Trading Quality for Compile Time: Ultra-Fast Placement for FPGAs
The demand for high-speed FPGA compilation tools has occurred for three reasons: first, as FPGA device capacity has grown, the computation time devoted to placement and routing h...
Yaska Sankar, Jonathan Rose