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ISCA
1997
IEEE
120views Hardware» more  ISCA 1997»
13 years 12 months ago
Run-Time Adaptive Cache Hierarchy Management via Reference Analysis
Improvements in main memory speeds have not kept pace with increasing processor clock frequency and improved exploitation of instruction-level parallelism. Consequently, the gap b...
Teresa L. Johnson, Wen-mei W. Hwu
ICWS
2009
IEEE
14 years 4 months ago
Adaptive Prefetching Scheme Using Web Log Mining in Cluster-Based Web Systems
The main memory management has been a critical issue to provide high performance in web cluster systems. To overcome the speed gap between processors and disks, many prefetch sche...
Heung Ki Lee, Baik Song An, Eun Jung Kim
CIIA
2009
13 years 8 months ago
Sharing and Protecting Networked Digital Life Memories
The increasing power of computers, increasing capacity of digital memory and wider availability of a great variety of input devices such as cameras and video recorders, has resulte...
Madjid Merabti
USENIX
2003
13 years 9 months ago
Design and Implementation of Power-Aware Virtual Memory
Despite constant improvements in fabrication technology, hardware components are consuming more power than ever. With the everincreasing demand for higher performance in highly-in...
Hai Huang, Padmanabhan Pillai, Kang G. Shin
CASES
2010
ACM
13 years 5 months ago
Balancing memory and performance through selective flushing of software code caches
Dynamic binary translators (DBTs) are becoming increasingly important because of their power and flexibility. However, the high memory demands of DBTs present an obstacle for all ...
Apala Guha, Kim M. Hazelwood, Mary Lou Soffa