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» The Heterogeneous Bulk Synchronous Parallel Model
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PPL
2002
108views more  PPL 2002»
13 years 7 months ago
An Efficient Implementation of the BSP Programming Library for VIA
Virtual Interface Architecture(VIA) is a light-weight protocol for protected user-level zero-copy communication. In spite of the promised high performance of VIA, previous MPI imp...
Yang-Suk Kee, Soonhoi Ha
IPPS
1998
IEEE
13 years 11 months ago
Runtime Support for Virtual BSP Computer
Abstract. Several computing environments including wide area networks and nondedicated networks of workstations are characterized by frequent unavailability of the participating ma...
Mohan V. Nibhanupudi, Boleslaw K. Szymanski
COOPIS
2004
IEEE
13 years 11 months ago
A Distributed and Parallel Component Architecture for Stream-Oriented Applications
Abstract. This paper introduces ThreadMill - a distributed and parallel component architecture for applications that process large volumes of streamed (time-sequenced) data, such a...
Paulo Barthelmess, Clarence A. Ellis
CODES
2009
IEEE
14 years 7 days ago
A tuneable software cache coherence protocol for heterogeneous MPSoCs
In a multiprocessor system-on-chip (MPSoC) private caches introduce the cache coherence problem. Here, we target at heterogeneous MPSoCs with a network-on-chip (NoC). Existing har...
Frank E. B. Ophelders, Marco Bekooij, Henk Corpora...
PPOPP
2010
ACM
14 years 4 months ago
Scalable communication protocols for dynamic sparse data exchange
Many large-scale parallel programs follow a bulk synchronous parallel (BSP) structure with distinct computation and communication phases. Although the communication phase in such ...
Torsten Hoefler, Christian Siebert, Andrew Lumsdai...