212 search results - page 23 / 43 » The Impact of Memory Models on Software Reliability in Multi... |
CASES
2001
ACM
13 years 11 months ago
2001
ACM
Intertask/interprocess synchronization overheads may be significant in a multiprocessor-shared memory System-on-a-Chip implementation. These overheads are observed in terms of loc...
PPOPP
2009
ACM
14 years 8 months ago
2009
ACM
Due to power wall, memory wall, and ILP wall, we are facing the end of ever increasing single-threaded performance. For this reason, multicore and manycore processors are arising ...
CODES
2009
IEEE
14 years 23 days ago
2009
IEEE
Performance estimation of Multi-Processor System-On-Chip (MPa high abstraction level is required in order to perform early architecture exploration and accurate design validations...
SAS
2007
Springer
14 years 2 months ago
2007
Springer
We present a new pointer analysis for use in shared memory programs running on hierarchical parallel machines. The analysis is motivated by the partitioned global address space lan...
ASPLOS
2004
ACM
14 years 1 months ago
2004
ACM
Sampling has been successfully used to identify performance optimization opportunities. We would like to apply similar techniques to check program correctness. Unfortunately, samp...