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ICRA
2000
IEEE
110views Robotics» more  ICRA 2000»
13 years 11 months ago
An Implicit Time-Stepping Scheme for Rigid Body Dynamics with Coulomb Friction
In this paper a new time-stepping method for simulating systems of rigid bodies is given. Unlike methods which take an instantaneous point of view, our method is based on impulse-m...
David E. Stewart, Jeffrey C. Trinkle
ASYNC
2006
IEEE
92views Hardware» more  ASYNC 2006»
14 years 1 months ago
Low-Overhead Testing of Delay Faults in High-Speed Asynchronous Pipelines
We propose a low-overhead method for delay fault testing in high-speed asynchronous pipelines. The key features of our work are: (i) testing strategies can be administered using l...
Gennette Gill, Ankur Agiwal, Montek Singh, Feng Sh...
CAV
1998
Springer
108views Hardware» more  CAV 1998»
13 years 11 months ago
Decomposing the Proof of Correctness of pipelined Microprocessors
We present a systematic approach to decompose and incrementally build the proof of correctness of pipelined microprocessors. The central idea is to construct the abstraction funct...
Ravi Hosabettu, Mandayam K. Srivas, Ganesh Gopalak...
EMNLP
2006
13 years 8 months ago
Solving the Problem of Cascading Errors: Approximate Bayesian Inference for Linguistic Annotation Pipelines
The end-to-end performance of natural language processing systems for compound tasks, such as question answering and textual entailment, is often hampered by use of a greedy 1-bes...
Jenny Rose Finkel, Christopher D. Manning, Andrew ...
EURODAC
1995
IEEE
195views VHDL» more  EURODAC 1995»
13 years 11 months ago
A hardware/software partitioning algorithm for pipelined instruction set processor
This paper proposes a new method to design an optimal instruction set for pipelined ASIP development using a formal HW/SW codesign methodology. The codesign task addressed in this...
Binh Ngoc Nguyen, Masaharu Imai, Nobuyuki Hikichi