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IEEEPACT
2006
IEEE
14 years 2 months ago
Whole-program optimization of global variable layout
On machines with high-performance processors, the memory system continues to be a performance bottleneck. Compilers insert prefetch operations and reorder data accesses to improve...
Nathaniel McIntosh, Sandya Mannarswamy, Robert Hun...
PPOPP
2009
ACM
14 years 9 months ago
Detecting and tolerating asymmetric races
Because data races represent a hard-to-manage class of errors in concurrent programs, numerous approaches to detect them have been proposed and evaluated. We specifically consider...
Paruj Ratanaworabhan, Martin Burtscher, Darko Kiro...
PPOPP
2009
ACM
14 years 9 months ago
Safe open-nested transactions through ownership
Researchers in transactional memory (TM) have proposed open nesting as a methodology for increasing the concurrency of transactional programs. The idea is to ignore "low-leve...
Kunal Agrawal, I.-Ting Angelina Lee, Jim Sukha
JPDC
2007
167views more  JPDC 2007»
13 years 8 months ago
On the design of high-performance algorithms for aligning multiple protein sequences on mesh-based multiprocessor architectures
In this paper, we address the problem of multiple sequence alignment (MSA) for handling very large number of proteins sequences on mesh-based multiprocessor architectures. As the ...
Diana H. P. Low, Bharadwaj Veeravalli, David A. Ba...

Lecture Notes
1005views
15 years 8 months ago
Lectures on reconfigurable computing
Driven by recent innovations in Field-Programmable Gate Arrays (FPGAs), reconfigurable computing offers unique ways to accelerate key algorithms. FPGAs offer a programmable logic f...
Sherief Reda