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» The Logic of Correctness in Software Engineering
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VLSI
2005
Springer
15 years 11 months ago
Pareto Points in SRAM Design Using the Sleepy Stack Approach
Leakage power consumption of current CMOS technology is already a great challenge. ITRS projects that leakage power consumption may come to dominate total chip power consumption a...
Jun-Cheol Park, Vincent John Mooney III
ECOOP
2004
Springer
15 years 11 months ago
Sequential Object Monitors
Abstract. Programming with Java monitors is recognized to be difficult, and potentially inefficient due to many useless context switches induced by the notifyAll primitive. This pa...
Denis Caromel, Luis Mateu, Éric Tanter
GLVLSI
1998
IEEE
122views VLSI» more  GLVLSI 1998»
15 years 10 months ago
Reducing Power Consumption of Dedicated Processors Through Instruction Set Encoding
With the increased clock frequency of modern, high-performance processors over 500 MHz, in some cases, limiting the power dissipation has become the most stringent design target. ...
Luca Benini, Giovanni De Micheli, Alberto Macii, E...
SIGMOD
1997
ACM
107views Database» more  SIGMOD 1997»
15 years 10 months ago
Picture Programming Project
Visual Language (VL) system development is getting increasingly sophisticated in part due to the arduous nature of user interface (UI) code development. This typically involves id...
Nita Goyal, Charles Hoch, Ravi Krishnamurthy, Bria...
ERLANG
2007
ACM
15 years 10 months ago
A language for specifying type contracts in Erlang and its interaction with success typings
We propose a small extension of the ERLANG language that allows programmers to specify contracts with type information at the level of individual functions. Such contracts are opt...
Miguel Jimenez, Tobias Lindahl, Konstantinos F. Sa...