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FPGA
2006
ACM
129views FPGA» more  FPGA 2006»
14 years 17 days ago
Power-aware RAM mapping for FPGA embedded memory blocks
Embedded memory blocks are important resources in contemporary FPGA devices. When targeting FPGAs, application designers often specify high-level memory functions which exhibit a ...
Russell Tessier, Vaughn Betz, David Neto, Thiagara...
GECCO
2006
Springer
206views Optimization» more  GECCO 2006»
14 years 17 days ago
A dynamically constrained genetic algorithm for hardware-software partitioning
In this article, we describe the application of an enhanced genetic algorithm to the problem of hardware-software codesign. Starting from a source code written in a high-level lan...
Pierre-André Mudry, Guillaume Zufferey, Gia...
FC
2000
Springer
106views Cryptology» more  FC 2000»
14 years 16 days ago
Capability-Based Financial Instruments
Every novel cooperative arrangement of mutually suspicious parties interacting electronically -- every smart contract -- effectively requires a new cryptographic protocol. However,...
Mark S. Miller, Chip Morningstar, Bill Frantz
FPGA
2000
ACM
120views FPGA» more  FPGA 2000»
14 years 16 days ago
A novel high throughput reconfigurable FPGA architecture
With increased logic density due to the shift towards Deep Submicron technologies (DSM), FPGAs have become a viable option for implementing large designs. However, most commercial...
Amit Singh, Luca Macchiarulo, Arindam Mukherjee, M...
ICSE
2000
IEEE-ACM
14 years 15 days ago
Software economics: a roadmap
The fundamental goal of all good design and engineering is to create maximal value added for any given investment. There are many dimensions in which value can be assessed, from m...
Barry W. Boehm, Kevin J. Sullivan