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» The Nachos Instructional Operating System
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PPOPP
2009
ACM
14 years 9 months ago
Serialization sets: a dynamic dependence-based parallel execution model
This paper proposes a new parallel execution model where programmers augment a sequential program with pieces of code called serializers that dynamically map computational operati...
Matthew D. Allen, Srinath Sridharan, Gurindar S. S...
CF
2004
ACM
14 years 2 months ago
Predictable performance in SMT processors
Current instruction fetch policies in SMT processors are oriented towards optimization of overall throughput and/or fairness. However, they provide no control over how individual ...
Francisco J. Cazorla, Peter M. W. Knijnenburg, Riz...
CASES
2005
ACM
13 years 10 months ago
Exploring the design space of LUT-based transparent accelerators
Instruction set customization accelerates the performance of applications by compressing the length of critical dependence paths and reducing the demands on processor resources. W...
Sami Yehia, Nathan Clark, Scott A. Mahlke, Kriszti...
ISCAS
2005
IEEE
152views Hardware» more  ISCAS 2005»
14 years 2 months ago
Dictionary-based program compression on transport triggered architectures
— Program code size has become a critical design constraint of embedded systems. Large program codes require large memories, which increase the size and cost of the chip. Poor co...
Jari Heikkinen, Andrea G. M. Cilio, Jarmo Takala, ...
CC
2004
Springer
14 years 2 months ago
Region-Based Partial Dead Code Elimination on Predicated Code
Abstract. This paper presents the design, implementation and experimental evaluation of a practical region-based partial dead code elimination (PDE) algorithm on predicated code in...
Qiong Cai, Lin Gao 0002, Jingling Xue