283 search results - page 18 / 57 » The Price of Routing in FPGAs |
FPGA
2004
ACM
14 years 28 days ago
2004
ACM
We present the design of a high-performance, highly pipelined asynchronous FPGA. We describe a very fine-grain pipelined logic block and routing interconnect architecture, and sh...
FPL
2006
Springer
13 years 11 months ago
2006
Springer
As manufacturing technology enters the ultra-deep submicron era, wafer yields are destined to drop due to higher occurrence of physical defects on the die. This paper proposes a y...
DT
1998
13 years 7 months ago
1998
The logic blocks of most modern FPGAs contain clusters of look-up tables and flip flops, yet little is known about good choices for several key architectural parameters related ...
CDC
2008
IEEE
14 years 2 months ago
2008
IEEE
— This paper considers a network flow control problem where routing and input rates are controlled in a decentralized way across a network, to optimize a global welfare objectiv...
JUCS
2008
13 years 7 months ago
2008
: We present a distributed learning algorithm for optimizing transit prices in the inter-domain routing framework. We present a combined game theoretical and distributed algorithmi...